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for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. for small orders, phone 1-800-835-8769. general description the max4588 low-voltage, dual 4-channel multiplexer is designed for rf and video signal processing at fre- quencies up to 180mhz in 50 and 75 systems. a flexible digital interface allows control of on-chip func- tions through either a parallel interface or an spi/ microwire serial port. each channel of the max4588 is designed using a ? switch configuration, ensuring excellent high-frequency off-isolation. the max4588 has low on-resistance of 60 max, with an on-resistance match across all chan- nels of 4 max. additionally, on-resistance is flat across the specified signal range (2 max). the off- leakage current is under 1na at t a = +25?, and less than 10na at t a = +85?. the max4588 operates from single +2.7v to +12v or dual ?.7v to ?v supplies. when operating with a +5v supply, the inputs maintain ttl- and cmos-level com- patibility. the max4588 is available in 28-pin narrow dip, wide so, and space-saving ssop packages. applications rf switching automatic test equipment video signal routing networking high-speed data acquisition features ? low insertion loss: -2.5db up to 100mhz ? high off-isolation: -74db at 10mhz ? low crosstalk: -70db up to 10mhz ? 16mhz -0.1db signal bandwidth ? 180mhz -3db signal bandwidth ? 60 (max) on-resistance with ?v supplies ? 4 (max) on-resistance matching with ?v supplies ? 2 (max) on-resistance flatness with ?v supplies ? +2.7v to +12v single supply ?.7v to ?v dual supplies ? low power consumption: <20? ? rail-to-rail , bidirectional signal handling ? parallel or spi/microwire-compatible serial interface ? >?kv esd protection per method 3015.7 ? ttl/cmos-compatible inputs with v l = +5v max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer ________________________________________________________________ maxim integrated products 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 com2 v- no5 gnd no6 gnd a1/din no7 gnd no8 v l ser/par en a0/dout a2/sclk le/cs rs 4/8 no4 gnd no3 gnd no2 gnd no1 v+ com1 gnd ssop/so/dip top view max4588 control logic 19-1425; rev 0; 1/99 part temp. range pin-package pin configuration ordering information max4588cpi 0? to +70? 28 narrow plastic dip max4588eai max4588ewi -40? to +85? -40? to +85? 28 ssop 28 wide so max4588epi -40? to +85? 28 narrow plastic dip spi is a trademark of motorola, inc. microwire is a trademark of national semiconductor corp. rail-to-rail is a registered trademark of nippon motorola, ltd. max4588cai 0? to +70? 28 ssop max4588cwi 0? to +70? 28 wide so
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?ual supplies (v+ = v l = +4.5v to +5.5v, v- = -4.5v to -5.5v, v inh = +2.4v, v inl = +0.8v, t a = t min to t max , unless otherwise noted. typical val- ues are at t a = +25?, v+ = v l = +5v, v- = -5v.) (note 2) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (voltages referenced to gnd) v+ ........................................................................-0.3v to +13.0v v l .......................-0.3v to (v+ + 0.3v) or 7v (whichever is lower) v- ........................................................................-13.0v to +0.3v v+ to v-................................................................-0.3v to +13.0v v no_ , v com_ (note 1) ..........................(v- - 0.3v) to (v+ + 0.3v) 4/ 8 , rs , le / cs , a2/sclk, a1/din, a0/dout, en, ser/ par to gnd ...............-0.3v to (v+ + 0.3v) continuous current into any terminal..............................?0ma peak current into any terminal (pulsed at 1ms, 10% duty cycle)..................................?0ma esd per method 3015.7.......................................................?kv continuous power dissipation (t a = +70?) ssop (derate 9.52mw/? above +70?) ....................762mw wide so (derate 12.50mw/? above +70?)................1.00w plastic dip (derate 14.29mw/? above +70?) ............1.14w operating temperature ranges max4588c_ i ......................................................0? to +70? max4588e_ i ...................................................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering, 10sec) .............................+300? note 1: voltages on these pins exceeding v+ or v- are clamped by internal diodes. limit forward diode current to maximum current rating. +25? v+ = 5v, v- = -5v, v no_ = ?v, i com_ = 4ma c, e +25? c, e c, e +25? c, e +25? t a +25? v+ = 5.5v, v- = -5.5v, v com_ = ?.5v, v no_ = + 4.5v v+ = 5v, v- = 5v, v no_ = ?v, i com_ = 4ma c, e v+ = 5v; v- = -5v; v no_ = 1v, 0, -1v; i com_ = 1ma +25? conditions v+ = 5.5v, v- = -5.5v, v com_ = ?.5v, v no_ = ?.5v or floating c, e v+ = 5.5v, v- = -5.5v, v com_ = ?.5v, v no_ = + 4.5v c, e c, e c, e v in_ = 0 or v l na -2 0.01 2 i com_(on) com_ on-leakage current (note 6) -20 20 na -2 0.01 2 i com_(off) com_ off-leakage current (note 6) logic output (serial ? -1 0.03 1 i in input current v 0.2 input threshold hysteresis -20 20 logic inputs (pins 11 v 2.4 1.7 v inh 40 60 r on on-resistance v v- v+ v com_ , v no analog switch analog signal range (note 3) input logic threshold high v 1.5 0.8 v inl -10 10 na -1 0.01 1 i no_(off) no_ off-leakage current (note 6) 3 75 14 d r on on-resistance match between channels (note 4) 5 0.5 2.5 r flat(on) on-resistance flatness (note 5) units min typ max symbol parameter input logic threshold low c, e c, e i source = -1ma i sink = 3.2ma v v l - 1 v oh v 0.4 v ol dout logic low output dout logic high output analog switch logic inputs (4/ 8 , rs , le / cs , a2/sclk, a1/din, a0/dout, en, ser/ par ) logic output (serial interface)
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer _______________________________________________________________________________________ 3 electrical characteristics?ual supplies (continued) (v+ = v l = +4.5v to +5.5v, v- = -4.5v to -5.5v, v inh = +2.4v, v inl = +0.8v, t a = t min to t max , unless otherwise noted. typical val- ues are at t a = +25?, v+ = v l = +5v, v- = -5v.) (note 2) 4-channel mode t a 8-channel mode 4-channel mode 8-channel mode conditions units min typ max symbol parameter +25? +25? c, e +25? c, e +25? c, e v no_ = 0, f in = 1mhz, figure 4 +25? c l = 1.0nf, v no_ = 0, r s = 0, figure 3 v no_ = ?v, v+ = 5.5v, v- = -5.5v, figure 2 v no_ = 3v, v+ = 4.5v, v- = -4.5v, figure 1 v no_ = 3v, v+ = 4.5v, v- = -4.5v, figure 1 +25? +25? v no_ = 1v rms , f = 10mhz, all channels off, figure 5 v com_ = 0, f in = 1mhz, figure 4 +25? v com_ = 0, f in = 1mhz, figure 4 +25? +25? figure 5 v no_ = 1v rms , f = 10mhz, figure 5 figure 5 v iso off-isolation (note 7) pf 7 c com_(on) pf 4 c com_(off) com_ off-capacitance com_ on-capacitance parallel mode input tim- 11 mhz 16 bw -0.1db bandwidth db -74 db -70 v ct channel-to-channel crosstalk mhz 180 bw switch dynamic charac- -3db bandwidth 140 pf 2 c no_(off) no_ off-capacitance pc 15 q charge injection ns 10 180 t bbm break-before-make time delay (note 3) ns 380 550 t on turn-on time 600 ns 150 300 t off turn-off time 350 c, e figure 6 c, e c, e c, e c, e c, e c, e figure 7 c, e figure 7 figure 7 figure 6 figure 6 figure 6 c, e c, e figure 7 figure 7 figure 7 c, e c, e c, e figure 7 figure 7 figure 7 ns 50 t css0 cs fall to sclk rise setup time ns 0 t dh ns 60 t ds din to sclk rise setup time din to sclk rise hold time ns 0 t csh1 cs rise to sclk rise hold time ns 80 t css1 cs rise to sclk rise setup time ns 80 t css1 ns 80 t ds a_, en to le rise setup time cs fall to sclk rise hold time ns 80 t cl sclk pulse width low ns 80 t ch sclk pulse width high mhz 6.25 f clk operating frequency ns 0 t dh a_, en to le rise hold time ns 80 t l le low pulse width ns 80 t rs rs low pulse width serial peripheral inter- c, e figure 6 ns 80 t rs rs low pulse width c, e c l = 50pf, figure 7 ns 150 t do sclk rise to dout valid serial-interface timing parallel-interface timing switch dynamic characteristics
v+ = 5.5v max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer 4 _______________________________________________________________________________________ electrical characteristics?ual supplies (continued) (v+ = v l = +4.5v to +5.5v, v- = -4.5v to -5.5v, v inh = +2.4v, v inl = +0.8v, t a = t min to t max , unless otherwise noted. typical val- ues are at t a = +25?, v+ = v l = +5v, v- = -5v.) (note 2) t a conditions units min typ max symbol parameter 2.7 v+ v l v ?.7 ? v+, v- power-supply range power supply +25? c, e +25? v+ = 5.5v, v- = -5.5v v+ = 5.5v, v- = -5.5v c, e c, e v l = 5.5v, all v in_ = 0 or v l ? -1 0.0001 1 i- v - supply current -10 10 ? -1 0.0001 1 i+ v+ supply current -10 10 ? -10 2 10 i l v l supply current electrical characteristics?ingle +5v supply (v+ = v l = +4.5v to +5.5v, v- = 0, v inh = +2.4v, v inl = +0.8v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?, v+ = v l = +5v.) (note 2) +25? v+ = 5v, v no_ = 3v, i com_ = 4ma c, e +25? c, e c, e +25? c, e +25? t a +25? v+ = 5.5v; v com_ = 4.5v, 1v; v no_ = 1v, 4.5v v no_ = 2v, 3v, 4v v+ = 5v, v no_ = 3v, i com_ = 4ma c, e v+ = 5v, i com_ = 4ma, +25? conditions v+ = 5.5v; v com_ = 4.5v, 1v; v no_ = 4.5v, 1v, or floating c, e v+ = 5.5v; v com_ = 4.5v, 1v; v no_ = 1v, 4.5v c, e c, e c, e v in = 0 or v l na -2 0.005 2 i com_(on) com_ on leakage current (notes 6, 9) -20 20 na -2 0.005 2 i com(off) com_ off leakage current (notes 6, 9) logic output (serial ? -1 1 i in input current v 0.2 input threshold hysteresis -20 20 logic inputs (pins 11 through v 2.4 1.7 v inh 80 120 r on on-resistance v 0v+ v com_ , v no_ analog switch analog signal range (note 3) input logic threshold high v 1.5 0.8 v inl -10 10 na -1 0.005 1 i no_(off) no_ off leakage current (notes 6, 9) 12 150 18 d r on on-resistance match between channels (note 4) 10 410 r flat(on) on-resistance flatness (note 5) units min typ max symbol parameter input logic threshold low c, e c, e i source = -1ma i sink = 3.2ma v v l - 1 v oh v 0.4 v ol dout logic low output dout logic high output power supply analog switch logic inputs (4/ 8 , rs , le / cs , a2/sclk, a1/din, a0/dout, en, ser/ par ) logic output (serial interface) v+ = 5v, i com_ = 4ma, v no_ = 2v, 3v, 4v
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer _______________________________________________________________________________________ 5 electrical characteristics?ingle +5v supply (continued) (v+ = v l = +4.5v to +5.5v, v- = 0, v inh = +2.4v, v inl = +0.8v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?, v+ = v l = +5v.) (note 2) t a conditions 4-channel mode 8-channel mode 4-channel mode 8-channel mode units min typ max symbol parameter +25? +25? c, e +25? c, e +25? c, e v no_ = 1v rms , f = 10mhz, all channels off, figure 5 c l = 1.0nf, v no_ = 2.5v, r s = 0, figure 3 v no_ = 3v, v+ = 5.5v, figure 2 v no_ = 3v, v+ = 4.5v, figure 1 v no_ = 3v, v+ = 4.5v, figure 1 +25? +25? c, e c, e figure 5 c, e v no_ = 1v rms , f = 10mhz, figure 5 +25? c, e figure 6 figure 6 figure 6 figure 5 figure 6 75 mhz 100 bw db -70 v ct channel-to-channel crosstalk -3db bandwidth ns 80 t rs rs low pulse width ns 80 t l le low pulse width ns 0 t dh a_, en to le rise hold time mhz 10 bw -0.1db bandwidth 7 switch dynamic charac- parallel mode input tim- ns 80 t ds db -65 v iso off-isolation pc 5 q charge injection ns 10 200 t bbm break-before-make time delay (note 3) ns 550 800 t on turn-on time 900 ns 150 300 t off turn-off time 350 a_, en to le rise setup time c, e c, e c, e c, e c, e c, e c, e figure 7 c, e figure 7 figure 7 figure 7 figure 7 figure 7 figure 7 c, e c l = 50pf, figure 7 figure 7 ns 150 t do sclk rise to dout valid ns 80 t css1 cs rise to sclk rise setup time serial peripheral inter- ns 0 t csh1 cs rise to sclk rise hold time ns 50 t css0 cs fall to sclk rise setup time ns 0 t dh din to sclk rise hold time mhz 6.25 f clk operating frequency ns 80 t ch sclk pulse width high ns 80 t cl sclk pulse width low ns 60 t ds din to sclk rise setup time c, e figure 6 ns 80 t rs rs low pulse width c, e figure 7 ns 80 t css1 cs fall to sclk rise hold time switch dynamic characteristics parallel-interface timing serial-interface timing
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer 6 _______________________________________________________________________________________ electrical characteristics?ingle +5v supply (continued) (v+ = v l = +4.5v to +5.5v, v- = 0, v inh = +2.4v, v inl = +0.8v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?, v+ = v l = +5v.) (note 2) t a conditions units min typ max symbol parameter c, e c, e +25? v l = 5.5v, all v in_ = 0 or v l v+ = 5.5v, v in = 0 or v l v+ 6.5v v+ > 6.5v ? -10 2 10 i l v l supply current -10 10 ? -1 1 i+ v+ supply current power supply v 2.7 12 v+ power-supply range 2.7 v+ v l 2.7 6.5 electrical characteristics?ingle +3v supply (v+ = v l = +2.7v to +3.6v, v- = 0, v inh = +2v, v inl = +0.5v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?, v+ = v l = +3.0v.) +25? v+ = 2.7v, v no_ = 1v, i com_ = 1ma +25? c, e c, e c, e c, e v no_ = 1.5v, v+ = 2.7v, figure 1 t a c, e v in_ = 0 or v l +25? c, e conditions c, e v no_ = 1.5v, v+ = 2.7v, figure 1 c, e +25? c, e figure 6 figure 6 v no_ = 1.5v, v+ = 3.6v, figure 2 figure 6 500 ns 250 400 t off 200 turn-off time serial peripheral inter- ns 200 t l le low pulse width ns 0 t dh a_, en to le rise hold time break-before-make time delay (note 3) ns 10 350 t bbm 240 350 r on on-resistance v 0v+ v com_ , v no_ analog switch analog signal range parallel mode input tim- ns 200 t ds ns 700 1000 t on turn-on time switch dynamic charac- ? -1 1 i in input current 450 logic input (pins 11 through v 2.0 v inh input logic threshold high v 0.5 v inl input logic threshold low units min typ max symbol parameter a_, en to le rise setup time c, e c, e c, e figure 7 figure 7 figure 7 c, e c, e figure 7 figure 7 ns 200 t cl sclk pulse width low ns 200 t ch mhz 2.1 f clk operating frequency sclk pulse width high ns 100 t ds din to sclk rise setup time ns 0 t dh din to sclk rise hold time power supply c, e figure 6 ns 200 t rs rs low pulse width c, e figure 6 ns 200 t rs rs low pulse width analog switch logic inputs (4/ 8 , rs , le / cs , a2/sclk, a1/din, a0/dout, en, ser/ par ) switch dynamic characteristics parallel-interface timing serial-interface timing
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer _______________________________________________________________________________________ 7 electrical characteristics?ingle +3v supply (continued) (v+ = v l = +2.7v to +3.6v, v- = 0, v inh = +2v, v inl = +0.5v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?, v+ = v l = +3.0v.) t a conditions units min typ max symbol parameter c, e c, e c, e c, e c, e c l = 50pf, figure 7 c, e figure 7 figure 7 figure 7 +25? figure 7 v+ = 3.6v, v in = 0 or v l c, e v l = 3.6v, all v in = 0 or v l -10 10 ? -1 1 i+ power supply v+ supply current ? -10 1 10 i l v l supply current ns 250 t do sclk rise to dout valid ns 200 t css1 cs fall to sclk rise hold time ns 200 t css1 cs rise to sclk rise setup time ns 100 t css0 cs fall to sclk rise setup time ns 0 t csh1 cs rise to sclk rise hold time note 2: the algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. note 3: guaranteed by design. note 4: ? r on = ? r on(max) - ? r on(min) . note 5: resistance flatness is defined as the difference between the maximum and the minimum value of on-resistance as measured over the specified analog-signal range. note 6: leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at t a = +25?. note 7: off isolation = 20log 10 [v com_ / (v nc_ or v no_ )], v com_ = output, v nc_ or v no_ = input to off switch. note 8: between any two switches. note 9: leakage testing for single-supply operation is guaranteed by testing with dual supplies. power supply
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer 8 _______________________________________________________________________________________ typical operating characteristics (v+ = v l = +5v, v- = -5v, t a = +25?, unless otherwise noted.) 0 30 20 10 40 50 60 70 80 90 100 -6 -2 -4 0246 on-resistance vs. v com (dual supplies) max4588-01 v com (v) on-resistance ( w ) ?.5v ?v ?v ?v ?v 0 50 150 100 200 250 06 24 810 12 on-resistance vs. v com (single supply) max4588-02 v com (v) on-resistance ( w ) v+ = +2.5v v- = 0 v+ = +3.6v v+ = +3.0v v+ = +5v v+ = +9v v+ = +12v 20 30 25 40 35 50 45 55 65 60 70 -5 -3 -2 -1 -4 012 4 35 on-resistance vs. v com and temperature (dual supplies) max4588-03 v com (v) on-resistance ( w ) t a = +85? t a = +50? t a = +25? t a = 0? t a = -40? 40 60 50 80 70 100 90 110 130 120 140 0 1.0 1.5 2.0 0.5 2.5 3.0 3.5 4.5 4.0 5.0 on-resistance vs. v com and temperature (single supply) max4588-04 v com (v) on-resistance ( w ) t a = +85? v- = 0 t a = +50? t a = +25? t a = 0? t a = -40? 0.1p 1p 10p 100p 1n 10n -40 40 020 -20 60 80 100 120 on/off-leakage current vs. temperature max4588-05 temperature (?) leakage current (a) on-leakage off-leakage 0 10 5 20 15 30 25 35 -5 -1 -3 1 3 -4 0 -2 2 4 5 charge injection vs. v com max4588-06 v com (v) charge injection (pc) dual supplies single supply
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer _______________________________________________________________________________________ 9 1p 100p 10p 10n 1n 1 m 100n 10 m -40 0 20 -20 40 60 80 100 120 supply current vs. temperature max4588-09 temperature (?) supply current (a) i l i+ i- -90 -60 -70 -80 -50 -40 -30 -20 -10 0 10 100k 1m 10m 100m 1g insertion loss, off-isolation, and crosstalk vs. frequency (dual supplies) max4588-10 frequency (hz) amplitude (db) on loss r s = 75 w r l = 600 w crosstalk off-isolation -90 -60 -70 -80 -50 -40 -30 -20 -10 0 10 100k 1m 10m 100m 1g insertion loss, off-isolation, and crosstalk vs. frequency (single supply) max4588-11 frequency (hz) amplitude (db) insertion loss off-isolation crosstalk r s = 75 w r l = 600 w typical operating characteristics (continued) (v+ = v l = +5v, v- = -5v, t a = +25?, unless otherwise noted.) 0 200 100 400 300 500 600 2.5 4.0 4.5 3.0 3.5 5.0 5.5 6.0 on/off time vs. supply voltage max4588-07 supply voltage (?) t on, t off (ns) t off t on 0 100 300 200 400 500 -40-30-20-100 1020304050607080 on/off time vs. temperature max4588-08 temperature (?) t on, t off (ns) t off t on
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer 10 ______________________________________________________________________________________ pin description active-low reset input. in serial mode, drive rs low to force the latches and shift registers to the power- on reset state and force all switches open. in parallel mode, drive rs low to force the latches to the power- on reset state and force all switches open. see truth tables . rs 12 in parallel mode, this pin is the transparent latch enable. in the serial mode, this pin is the chip-select input. see truth tables. le / cs 13 most significant address bit in parallel mode with 4/ 8 low. if 4/ 8 pin is high, this pin is ignored. in the serial mode, this is the serial shift clock input. data is loaded on the rising edge of sclk. see truth tables . a2/sclk 14 address input in the parallel mode. serial data input in serial mode. in serial mode, data is loaded on sclk? rising edge. a1/din 15 least significant address input in the parallel mode. in the serial mode this is an output from the internal 4-bit shift register. dout is intended for daisy-chain cascading. dout is not three-stated by cs . see serial operation . a0/dout 16 normally open analog input terminal. see truth tables. no2 6 normally open analog input terminal. see truth tables. no3 8 normally open analog input terminal. see truth tables. no4 10 multiplexer configuration control. connect to v l to select dual 2-channel mode. connect to gnd for single 4-channel multiplexer operation. see truth tables . 4/ 8 11 normally open analog input terminal. see truth tables. no1 4 analog positive supply voltage input v+ 3 pin analog switch common terminal. see truth table. com1 2 ground. connect all ground pins to a ground plane. see grounding section. gnd 1, 5, 7, 9, 21, 23, 25 function name normally open analog input terminal. see truth tables . no5 26 analog negative supply voltage input. connect to ground plane for single-supply operation. v- 27 analog switch common terminal. see truth tables . com2 28 logic supply input. powers the dout driver and other digital circuitry. v l sets both the digital input and output logic levels. v l 19 normally open analog input terminal. see truth tables . no8 20 normally open analog input terminal. see truth tables . no7 22 normally open analog input terminal. see truth tables . no6 24 interface select input. drive low for parallel data interface operation. drive high for serial data interface operation and to enable the dout driver. ser/ par 18 switch enable. drive en low to force all channels off. drive high to allow normal multiplexer operation. operates asynchronously in serial mode. in parallel mode, en is latched when le signal is high. en 17
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer ______________________________________________________________________________________ 11 t off t on en v out v out en le/cs no_ v+ v+ com_ v no_ max4588 300 w 30pf 90% 90% 50% 50% gnd v- v- a0 v out gnd v out a0 no_ com_ v no_ max4588 300 w 30pf gnd no_ t bbm 90% le/cs ser/par v+ v+ v- v- d v out en v out d v out is the measured voltage due to charge transfer error q when the channel turns off. v+ v+ v- v- v out en no_ com_ max4588 q = d v out c l 1nf gnd c l 10 m f v no_ le/cs ser/par figure 1. turn-on/turn-off time figure 2. break-before-make time delay figure 3. charge injection
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer 12 ______________________________________________________________________________________ v+ v+ v- v- 1mhz capacitance analyzer no_ floating com_ max4588 gnd floating 1mhz capacitance analyzer no_ com_ max4588 gnd all signals normalized to v com = 0db. measure node measure node v+ v+ v- v- 50 w 50 w 50 w 56 w 49.9 w 24.9 w 560 w no_ no_ com_ max4588 + - t l t ds le a0, a1, a2, en rs note: all input signals are specified with t r and t f <10ns. timing is measured from 50% of digital signal. t dh t rs max4588 figure 4. no_, com_ capacitance figure 5. off-isolation, crosstalk, and bandwidth figure 6. parallel timing diagram
detailed description logic-level translators the max4588 is constructed of high-frequency ? switches, as shown in figure 8. the logic-level inputs are translated by amplifier a1 into a v+ to v- logic sig- nal that drives amplifier a2. amplifier a2 drives the gates of n-channel mosfets n1 and n2 from v+ to v-, turning them fully on or off. the same signal drives inverter a3 (which drives the p-channel mosfets p1 and p2, turning them fully on or off) from v+ to v-, and turns the n-channel mosfet n3 on and off. the logic- level threshold is determined by v l and gnd. switch on condition when the switch is on, mosfets n1, n2, p1, and p2 are on and mosfet n3 is off (figure 8). the signal path is com_ to no_, and because both n-channel and p-channel mosfets act as pure resistances, it is symmetrical (i.e., signals may pass in either direction). the off mosfet, n3, has no dc conduction, but has a small amount of capacitance to gnd. the four on mosfets also have capacitance to ground that, together with the series resistance, forms a lowpass fil- ter. all of these capacitances are distributed evenly along the series resistance, so they act as a transmis- sion line rather than a simple r-c filter. the max4588? construction allows an exceptional 180mhz bandwidth when the switches are on. typical attenuation in 75 systems is 2.5db and is rea- sonably flat up to 50mhz. higher-impedance circuits show even lower attenuation (and vice versa), but slightly lower bandwidth due to the increased effect of the internal and external capacitance and the switch? internal resistance. max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer ______________________________________________________________________________________ 13 a1 a2 a3 p1 n3 n1 v- gnd input v cc v+ v+ v+ com_ no_ n2 p2 normally open switch construction esd diodes on gnd, no_, and com_ t css cs sclk din dout note: all input signals are specified with t r and t f < 10ns. timing is measured from 50% of digital signal. t ds t dh a0 a1 a2 disable t do t ch t cl t csh max4588 figure 7. serial timing diagram figure 8. t-switch construction
max4588 the max4588 is optimized for ?v operation. using lower supply voltages or a single supply increases switching time, on-resistance (and therefore on-state attenuation), and nonlinearity. switch off condition when the switch is off, mosfets n1, n2, p1, and p2 are off and mosfet n3 is on (figure 8). the signal path is through the parasitic off-capacitances of the series mosfets, but it is shunted to ground by n3. this forms a highpass filter whose exact characteristics are dependent on the source and load impedances. in 75 systems, and below 10mhz, the attenuation can exceed 80db. this value decreases with increasing fre- quency and increasing circuit impedances. external capacitance and board layout have a major role in determining overall performance. applications information power-supply considerations overview the max4588 construction is typical of many cmos analog switches. it has four supply pins: v+, v-, v l , and gnd. v+ and v- are used to drive the internal cmos switches and set the limits of the analog voltage on any switch. reverse esd-protection diodes are internally connected between each analog signal pin and both v+ and v-. if the voltage on any pin exceeds v+ or v-, one of these diodes will conduct. during normal opera- tion these reverse-biased esd diodes leak, forming the only current drawn from v- and v+. virtually all the analog leakage current is through the esd diodes. although the esd diodes on a given sig- nal pin are identical, and therefore fairly well balanced, they are reverse-biased differently. each is biased by either v+ or v- and the analog signal. this means their leakages vary as the signal varies. the difference in the two diode leakages from the signal path to the v+ and v- pins constitutes the analog signal-path leakage cur- rent. all analog leakage current flows to the supply ter- minals, not to the other switch terminal. this explains how both sides of a given switch can show leakage currents of either the same or opposite polarity. there is no connection between the analog signal paths and gnd. the analog signal paths consist of an n-channel and p-channel mosfet with their sources and drains paralleled and their gates driven out of phase with v+ and v- by the logic-level translators. v l and gnd power the internal logic and logic-level translators, and set the input logic thresholds. the logic-level translators convert the logic levels to switched v+ and v- signals to drive the gates of the analog switches. this drive signal is the only connec- tion between the logic supplies and the analog sup- plies. bipolar-supply operation the max4588 operates with bipolar supplies between ?.7v and ?v. the v+ and v- supplies are not required to be symmetrical, but their sum cannot exceed the absolute maximum rating of 13.0v. do not connect the max4588 v+ pin to +3v and connect the logic-level input pins to +5v logic-level signals. this level exceeds the absolute maximum ratings, and may cause damage to the part and/or external circuits. caution: the absolute maximum v+ to v- differen- tial voltage is 13.0v. typical ?-volt?or ?2-volt supplies with ?0% tolerances can be as high as 13.2v. this voltage can damage the max4588. even ?% tolerance supplies may have overshoot or noise spikes that exceed 13.0v. single-supply operation the max4588 operates from a single supply between +2.7v and +12v when v- is connected to gnd. observe all of the precautions listed in the bipolar- supply operation section. note, however, that these parts are optimized for ?v operation, and ac and dc characteristics are degraded significantly when operat- ing at less than ?v. as the overall supply voltage (v+ to v-) is reduced, switching speed, on-resistance, off- isolation, and distortion are degraded (see typical operating characteristics ). single-supply operation also limits signal levels and interferes with grounded signals. when v- = 0, ac sig- nals are limited to -0.3v. voltages below -0.3v can be clipped by the internal esd-protection diodes, and the parts can be damaged if excessive current flows. power off when power to the max4588 is off (i.e., v+ = 0 and v- = 0), the absolute maximum ratings still apply. this means that none of the max4588 pins can exceed ?.3v. voltages beyond ?.3v cause the internal esd- protection diodes to conduct, with potentially cata- strophic consequences. power-supply sequencing when applying power to the max4588, follow this sequence: v+, v- (if biased to potential other than ground), v l , then logic inputs. apply signals on the analog no_ and com_ pins any time after v+, v-, and gnd voltages are set. turning on all pins simultaneous- ly is acceptable only if the circuit design guarantees concurrent power-up. low-voltage, high-isolation, dual 4-channel rf/video multiplexer 14 ______________________________________________________________________________________
the power-down sequence is the opposite of the power-up sequence. that is, the v l and logic inputs must go to zero potential before (or simultaneously with) the v- then v+ supplies. the absolute maximum ratings must always be observed in order to ensure proper operation. grounding dc ground considerations satisfactory high-frequency operation requires that careful consideration be given to grounding. for most applications, a ground plane is strongly recom- mended, and all gnd pins must connect to it with solid copper. while the v+ and v- power-supply pins are common to all switches in a given package, each input is separated with ground pins that are not inter- nally connected to each other. this contributes to the overall high-frequency performance by reducing chan- nel-to-channel crosstalk. all the gnd pins have esd diodes to v+ and v-. in systems that have separate digital and analog (sig- nal) grounds, connect all gnd pins to analog signal ground. preserving a good signal ground is much more important than preserving a digital ground. ground cur- rent is only a few nanoamperes. the digital inputs have voltage thresholds determined by v l and gnd (v- does not influence the logic-level thresh- old). with +5v applied to v l , the threshold is about 1.6v, ensuring compatibility with ttl- and cmos-logic drivers. ac ground and bypassing a ground plane is mandatory for satisfactory high- frequency operation. prototyping using hand wiring or wire-wrap boards is not recommended. connect all gnd pins to the ground plane with solid copper. (the gnd pins extend the high-frequency ground through the package wire-frame, into the silicon itself, thus improving isolation.) make the ground plane solid metal underneath the device, without interruptions. there should be no traces under the device itself. for dip packages, this applies to both sides of a two-sided board. failure to observe this has a minimal effect on the ?n?characteristics of the switch at high frequen- cies, but will degrade the off-isolation and crosstalk. when using the max4588? so package on pc boards with a buried ground plane, connect each gnd pin to the ground plane with a separate via. do not share this via with any other ground path. providing a ground via on both sides of the smt land further enhances the off-isola- tion by lowering the parasitic inductance. the dip pack- age can have the through-holes directly tied to the buried plane, or thermally relieved as required to meet manufac- turability requirements. again, do not use the through- hole pads as the current path for any other components. bypass all v+ and v- pins to the ground plane with sur- face-mount 0.01? capacitors. locate these capacitors as close as possible to the pins on the same side of the board as the device. do not use feedthroughs or vias for bypass capacitors. if board layout dictates that the bypass capacitors are mounted on the opposite side of the pc board, use short feedthroughs or vias, directly under the v+ and v- pins. use multiple vias if possible. if v- is 0, connect it directly to the ground plane with solid copper. keep all traces short. signal routing keep all signal leads as short as possible. separate all signal leads from each other, and keep them away from any other traces that could induce interference. separating the signal traces with generously sized ground wires also helps minimize interference. routing signals via coaxial cable, terminated as close to the max4588 as possible, provides the highest isolation. board layout ic sockets degrade high-frequency performance and should not be used if signal bandwidth exceeds 5mhz. surface-mount parts, having shorter internal lead frames, provide the best high-frequency performance. keep all bypass capacitors close to the device, and separate all signal leads with ground planes. such grounds tend to be wedge-shaped as they get closer to the device. use vias to connect the ground planes on each side of the board, and place the vias in the apex of the wedge-shaped grounds that separate signal leads. logic-level signal lead placement is not critical. impedance matching the max4588 is intended for use in 75 systems, where the inputs are terminated external to the ic and the com terminals see an impedance of 600 or high- er. the max4588 can operate in 50 and 75 systems with terminations through the ic. however, variations in r on and r on flatness cause nonlinearities. crosstalk and off-isolation the graphs shown in typical operating characteristics for crosstalk and off-isolation are taken on adjacent channels. the adjacent channel is the worst-case con- dition. for example, no1 has the worst off-isolation to com1 due to their proximity. furthermore, no1 has the most crosstalk to no2, and the least crosstalk to no4. choosing channels wisely necessitates separating the most sensitive channels from the most offensive. conversely, the above information also applies to the no5?o8 inputs to the com2 pin. max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer ______________________________________________________________________________________ 15
max4588 power-on reset (por) the max4588 has internal circuitry to guarantee a known state on power-up. in the default state, a0 = a1 = a2 = 0, disable = 1, and all switches are off. this state is equivalent to asserting rs during normal opera- tion. serial operation the serial mode is activated by driving the ser/ par input pin to a logic high. the data is then entered using a normal spi/microwire write operation. refer to figure 7 for a detailed diagram of the serial-interface logic. there are four flip-flops in the shift register, with the out- put of the fourth shift register being output on the dout pin. note: dout changes on the rising edge of sclk. this allows cascading of multiple max4588s using only one chip-select line. for example, one 16-bit write could load the shift registers of four cascaded max4588s. the data from the shift register is moved to the internal con- trol latches only upon the rising edge of cs , so all four max4588s change state simultaneously. parallel operation the parallel mode is activated by driving ser/ par to a logic low. the max4588 is programmed by a latched parallel bus scheme. refer to figure 6 for a detailed diagram of the parallel-interface logic. note that 4/ 8 is not latched. it is best to hard-wire 4/ 8 to a known state for the desired mode of operation, or to use a dedicat- ed microcontroller port pin. low-voltage, high-isolation, dual 4-channel rf/video multiplexer 16 ______________________________________________________________________________________ parallel operation connects no5 to com2 1 0 connects no6 to com2 1 0 connects no7 to com2 1 0 connects no8 to com2 1 0 connect no1 to com1 and no5 to com2 x 0 connects no1 to com1 0 0 connects no2 to com1 0 0 connects no3 to com1 0 0 connects no4 to com1 0 0 all switches off. x 0 serial mode. refer to serial operation truth table . x 1 ser/ par all switches off, latches are cleared. x x maintain previous state. x 0 switch states a2 0 0 1 1 0 0 0 1 1 x x x x a1 0 1 0 1 0 0 1 0 1 x x x x a0 1 1 1 1 1 1 1 1 1 0 x x x en 0 0 0 0 0 0 0 0 0 0 x x 1 le 1 1 1 1 1 1 1 1 1 1 1 0 1 rs 0 0 0 0 1 0 0 0 0 x x x x 4/ 8 8 connect no2 to com1 and no6 to com2 x 0 connect no3 to com1 and no7 to com2 x 0 connect no4 to com1 and no8 to com2 x 0 0 1 1 1 0 1 1 1 1 0 0 0 1 1 1 1 1 1 x = don? care note: 4/8 is not latched when le is high. when le is low, all latches are transparent. a2, a1, a0, and en are latched. connect com1 to com2 externally for 1-of-8 single-ended operation. truth tables
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer ______________________________________________________________________________________ 17 serial operation contents of shift register transferred to control latches. 1 x x 1 1 * input shift register loads one bit from din. dout updates on sclk? rising edge. 0 1 input shift register loads one bit from din. dout updates on sclk? rising edge. 0 1 chip unselected. 1 1 all switches off. x 1 ser /par parallel mode. refer to parallel operation truth table. x 0 all switches off. latches and shift register are cleared. this is the power-on reset (por) state. x 1 on switches/states cs x x x x sclk 0 1 x x x x din 1 1 1 0 x x en 1 1 1 1 x 0 rs * * * * high-z 0 dout control bit and 4/ 8 logic connect no5 to com2 1 0 connect no6 to com2 1 0 connect no7 to com2 1 0 connect no8 to com2 1 0 connect no1 to com1 and no5 to com2 x 0 connect no1 to com1 0 0 connect no2 to com1 0 0 connect no3 to com1 0 0 connect no4 to com1 0 0 all switches off. x 1 disable bit on switches/states a2 bit 0 0 1 1 0 0 0 1 1 x a1 bit 0 1 0 1 0 0 1 0 1 x a0 bit 0 0 0 0 1 0 0 0 0 x 4/ 8 8 pin connect no2 to com1 and no6 to com2 x 0 connect no3 to com2 and no7 to com2 x 0 connect no4 to com2 and no8 to com2 x 0 0 1 1 1 0 1 1 1 1 x = don? care * dout is delayed by 4 clock cycles from din. x = don? care note: disable, a2, a1, and a0 are the 4 bits latched into the max4588 with a microwire/spi write. a0 is the lsb (first bit in time). disable is the msb (last bit in time). truth tables (continued)
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer 18 ______________________________________________________________________________________ transistor count: 1033 ____________________chip information package information 28lnpdip.eps
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer ______________________________________________________________________________________ 19 package information (continued) soicw.eps
max4588 low-voltage, high-isolation, dual 4-channel rf/video multiplexer maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 1999 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) ssop.eps
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs max4588 part number table notes: see the max4588 quickview data sheet for further information on this product family or download the max4588 full data sheet (pdf, 320kb). 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 4. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 5. part number free sample buy direct package: type pins size drawing code/var * temp rohs/lead-free? materials analysis max4588c /d rohs/lead-free: no max4588c pi pdip;28 pin;.600" dwg: 21-0044b (pdf) use pkgcode/variation: p28-1 * 0c to +70c rohs/lead-free: no materials analysis max4588epi pdip;28 pin;.600" dwg: 21-0044b (pdf) use pkgcode/variation: p28-1 * -40c to +85c rohs/lead-free: no materials analysis max4588c wi+t 0c to +70c rohs/lead-free: yes max4588c wi+ soic ;28 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w28+1 * 0c to +70c rohs/lead-free: yes materials analysis max4588c wi soic ;28 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w28-1 * 0c to +70c rohs/lead-free: no materials analysis max4588c wi-t soic ;28 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w28-1 * 0c to +70c rohs/lead-free: no materials analysis
max4588ewi-t soic ;28 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w28-1 * -40c to +85c rohs/lead-free: no materials analysis max4588ewi soic ;28 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w28-1 * -40c to +85c rohs/lead-free: no materials analysis max4588eai+ ssop;28 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a28+1 * -40c to +85c rohs/lead-free: yes materials analysis max4588eai+t -40c to +85c rohs/lead-free: yes max4588c ai+t ssop;28 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a28+1 * 0c to +70c rohs/lead-free: yes materials analysis max4588c ai+ ssop;28 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a28+1 * 0c to +70c rohs/lead-free: yes materials analysis max4588c ai ssop;28 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a28-1 * 0c to +70c rohs/lead-free: no materials analysis max4588c ai-t ssop;28 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a28-1 * 0c to +70c rohs/lead-free: no materials analysis max4588eai-t ssop;28 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a28-1 * -40c to +85c rohs/lead-free: no materials analysis max4588eai ssop;28 pin;.209" dwg: 21-0056c (pdf) use pkgcode/variation: a28-1 * -40c to +85c rohs/lead-free: no materials analysis didn't find what you need? c ontac t us: send us an email c opyright 2 0 0 7 by m axim i ntegrated p roduc ts , dallas semic onduc tor ? legal n otic es ? p rivac y p olic y

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